Digital System Design with High-Level Synthesis for FPGA: Combinational Circuits

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In the previous blog in this series, I briefly explained the concept of platform-based design in the context of embedded FPGA.  And the problems that it is going to address. In this blog, I will go through different parts of the Xilinx Vitis system platform. The platform encapsulates the hardware details, the Linux operating system kernel. It also contains the Xilinx runtime system and the related libraries.

A Vitis platform is used for two main reasons:

  • Developing applications and related libraries
  • Generating hardware and software configuration containing the developed applications

Hence, a platform consists of two types of files and configurations. The first group acts like templates that should be modified during the application development.  And the second group is directly copied into the embedded system hardware.

Among the first group is a hardware design template that contains all the base components and interfaces. This base design should be prepared by using Xilinx Vivado. OS libraries and drivers fit into the second group.

Digital System Design with High-Level Synthesis for FPGA: Combinational Circuits

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Creating a platform consists of three main steps:

  • Preparing the basic underlying hardware and interfaces
  • OS and libraries configuration and preparation
  • Integrating

In the first step, the Xilinx Vivado toolset is used to generate the basic hardware template. This design should at least contain the Zynq or ZynqMPSoC processor, clock, and interrupt resources. It also should define the interfaces through which the final design communicates with the system. A zip file with .xsa extension encapsulates all the generated files, bitstream, and configurations.

In the second step, the Xilinx PetaLinux toolset is used to configure and generate the Linux OS, device tree, and all the required drivers.  For this purpose, the created PetaLinux project is configured using the generated .xsa file generated in the previous step. Then some of the Linux kernel parameters should be defined or modified. The proper devicetree modification should also be added to the PetaLinux project.  

The last step, which uses the Xilinx Vitis environment, integrates all files into a package to be used by designers.

For a step-by-step tutorial for generating a Linux-based Platform for Ultra96v2 board, please visit here.

Digital System Design with High-Level Synthesis for FPGA: Combinational Circuits

Udemy Course