ZCU102 SW/HW Emulation Using Vitis-2022.2
This blog shows how to perform software and hardware emulations for ZCU102 platform using Vitis-2022.2. This flow has been tested…
This blog shows how to perform software and hardware emulations for ZCU102 platform using Vitis-2022.2. This flow has been tested…
The FPGA in the Kria KV260 board can be used to accelerate various software algorithms. The AMD-Xilinx Vitis toolset can…
In this blog, I will show how to emulate a software accelerator in Vitis 2022.1. I assume you have already…
Generating digital waveform is one of the several basic tasks in the digital design area. Here I am going to…
How can we control the execution of a hardware module generated by HLS flow? This post explains how to read…
The Mandelbrot set is a group of complex numbers c for which the sequence number generated by the quadratic recurrence…
Communication between two hardware modules is one of the main tasks in digital system design. When two tasks exchange signals…
Communicating with DDR memories in FPGA can be a performance bottleneck for FPGA accelerators. Using a proper data transaction protocol…
Data parallelism is mostly one of the first parallel execution patterns implemented in hardware and processor-based systems. In the simple…
Dependency, concurrency and parallelism are three main concepts in high-level synthesis code development. A proper understanding of these concepts can…