The AMD-Xilinx Vitis unified software platform is a tool combining the embedded software and FPGA-based software acceleration design flows.

In this blog, I am going to show how to emulate a software accelerator in Vitis 2022.1. Here, I assume that you have already installed the Vitis toolset on your Linux machine. If you haven’t installed that, just download that from the AMD-Xilinx download page and install that on a Linux machine. Please note that the Vitis application acceleration design flow is only supported in a Linux OS.

The Vitis toolset supports various FPGA platforms, including ZynqSoC, ZynqMPSoC, Versal and Alveo. This blog only covers the design flow for the ZCU102, a ZynqMPSoC embedded platform.

In contrast to the previous versions, the Vitis 2022.1 contains the pre-build hardware platforms for ZCU102, ZCU104, VCK190, and VMK180.

However, in order to compile and emulate hardware accelerators on the ZCU102 FPGA platform, you need to download and install a couple of files. An embedded platform requires a Linux kernel, a rootfs with integrated Xilinx Runtime, and a sysroot to cross-compile the host application [Ref: page 21 of UG1393].

Installation

To provide the required files

1- Download the ZYNQMP common image file.

2- Extract the file into a folder.

3- Go to xilinx-zynqmp-common-v2022.1 folder and have a look at the extracted files.

Running the sdk.sh script generates the sysroot, and using the -d option lets you define the target folder to install the generated sysroot. You can run this command.

./sdk.sh -d ~/zcu102

This command installs the sysroot in the zcu102 folder that you created earlier.

Create Project

1- Now, we are ready to create an application in Vitis. Run the vitis command in a command shell. Then click on the “Create Application Project” link.

2- On the “Create a New Application Project” page, click on Next.

3- On the Platform page, select the xilinx_zcu102base202210_1 platform and press Next.

4- Choose an application project name, for example, vector_addition. Then press Next.

5- Click on the Browse… next to the Sysroot path edit box on the Domain page. Then select the “<ZCU102 folder>/sysroot/cortexa72-cortexa53-xilinx-linux” folder.

6- Click on the Browse… icon next to the Root FS: edit box. Then select the <ZCU102 folder>/xilinx-zynqmp-common-v2022.1/rootfs.ext4 file.

7- Click the Browse… icon next to Kernel Image: edit box. Then select the Image file in the <ZCU102 folder>/xilinx-zynqmp-common-v2022.1 folder. Then press Next.

8- Select the Simple Vector Addition on the Template pageand press Finish. The project will be created. Now we can perform software and hardware emulations.

Software Emulation

1- To perform software emulation, open the “vector_addition_system.sprj” file under the created projected folder and ensure that Emulation-SW is selected as the “Active build configuration” option.

2- Right-click on the project folder and select the “Build Project” option.

3- You can run the software simulation after finishing the build process. For this purpose, right-click on the project folder and select the “Launch SW Emulator” option. Then click on the “Start Emulator and Run” button.

4- After a while, you will see the embedded Linux booting in the Emulation Console view and the results in the Console view.

Hardware Emulation

1- To perform hardware emulation, open the “vector_addition_system.sprj” file under the created projected folder and ensure that Emulation-HW is selected as the “Active build configuration” option.

2- Now right click on the project folder and select the “Build Project” option.

3- You can run the hardware simulation after finishing the build process. For this purpose, right-click on the project folder and select the “Launch HW Emulator” option. Then click on the “Start Emulator and Run” button. After a while, you will see the embedded Linux booting in the Emulation Console view and the results in the Console view.

4- If you select the “Launch Emulator in GUI mode to display waveforms” option, Vitis starts the Vivado wave editor to show the design waveforms.

5- After starting Vivado, it waits for you to click on “Run All (F3)”, so click the corresponding button, watch, and investigate the design signals.