Large Matrix-Matrix Multiplication on Dual-Core Cortex-A9+NEON
Goal Fast Matrix-Matrix Multiplication on Software Approach Cache-friendly code, using dual-core (with OpenMP) and NEON vector processor Benefits Very fast Matrix-Matrix…
Vector Addition in FPGA OpenCL: Part 1
Goal Implementing a large vector-addition on FPGA Approach Stream computing Benefits Utilising high memory bandwidth Credit This work has been…
Reducing II in HLS: Balanced-Paths
the goal of this blog is to show the impact of unbalanced conditional paths in high-level synthesis. For this purpose,…
Covariance: An OpenCL Implementation on Xilinx FPGA-Part 1
Goal Implementing the Covariance application for Xilinx FPGA Approach OpenCL for SDAccel Benefits Learning how to describe an application in…