Embedded System, FPGA-GPU-CPU Platform, Hardware Design, High-Level Synthesis, OpenCL

Fundamentals of High-Level Synthesis – Part 4: Dependency, Concurrency and parallelism

November 18, 2019 — 0 Comments

Embedded System, FPGA-GPU-CPU Platform, Hardware Design, High-Level Synthesis, Software

Embedded Hardware Accelerator with Xilinx Vitis: Part 2: Create a Linux-based Platform

November 15, 2019 — 0 Comments

Embedded System, FPGA-GPU-CPU Platform, Hardware Design, High-Level Synthesis, OpenCL, Software

Fundamentals of High-Level Synthesis Part 3: From Concurrency to Parallelism (Map Pattern)

November 10, 2019 — 1 Comment

Embedded System, FPGA-GPU-CPU Platform, Hardware Design, High-Level Synthesis, Software

Fundamentals of High-Level Synthesis Part 2: Concurrency vs Parallelism

November 10, 2019 — 1 Comment

Embedded System, FPGA-GPU-CPU Platform, Hardware Design, High-Level Synthesis, Software

Fundamentals of High-Level Synthesis Part 1: Basic Concepts

November 10, 2019 — 0 Comments

Embedded System, Hardware Design, High-Level Synthesis, OpenCL, Software

Embedded Hardware Accelerator with Xilinx Vitis: Part 1: Concept of Platform

November 10, 2019 — 1 Comment

Embedded System, Hardware Design, High-Level Synthesis, OpenCL

How to create Ultra96v2 Linux-based Platform in Xilinx Vitis 2019.2

November 7, 2019 — 29 Comments