This blog aims to explain the role of FPGA and high-level synthesis in the new computing architecture comprises of three layers: End Devices, Edge (Fog) Platforms, and Cloud Computing.

New Computing Architectures

Traditionally, everyday computing relies on a desktop or laptop computer. These computing platforms are usually connected to the Internet to get general information or download software applications from individual websites. Several people and organisations still use this model of computing.

In this computing model, people should buy different computing hardware and software resources and keep them on their premises. Therefore, maintenance, updating and expanding these resources are big challenges for their users, especially for small and medium-sized organisations.

The concept of cloud computing has emerged to solve these problems. The idea behind cloud computing is the on-demand availability of computing resources, including processors, software programs, databases.

The benefits of cloud computing are the reasons that we see these days most portable devices and mobiles are using these services. Let us call all the target devices that use cloud services as end devices.

The computing cost reduction caused by cloud platforms makes their services more affordable for a large group of users. However, this new technology has some issues such as security, data privacy, high response time and high network bandwidth demand, among others.

These issues have motivated researchers to propose edge (or fog) computing and move some of the cloud tasks to the edge of the network close to endpoint devices.

This new layer of computation enables data security, reduces the response time, decreases the network traffic between cloud and endpoint devices.

This evolutionary computing framework is distributed among cloud, edge, and endpoint devices.

Role of FPGA in the New Computing Architectures

FPGAs can be used in all layers. Small FPGAs can be used on edge devices to communicate directly with sensors and actuators.  One of the main benefits of using FPGAs on edge devices (also knows as IoT devices) is low response time compared to processor systems. Whereas processor systems usually use standard interfaces such as USB to communicate with sensors and actuators, FPGAs interact with them directly.

FPGAs are promising platforms for edge computing, and their main feature is accelerating compute-intensive algorithms with minimum power consumption. Zynq 7000 and Zynq UltraScale+ MPSoC are examples of FPGA-based embedded systems targeting edge computing.

High-end FPGAs are also introduced to be used in servers to accelerate the database tasks and reduce total power and energy consumption. The Xilinx Alveo FPGA family are designed for cloud database applications.

Role of HLS in the New Computing Architectures

Traditionally HDLs such as VHDL and Verilog are used to implement FPGA designs at this stage. However, using HLS instead of HDL can reduce the design and debug time.

HLS automatically provides several interfaces and protocols, such as AXI-light, AXI4 and AXI-stream, along with pipeline optimisation that helps designers design more complex circuits and controllers with less effort than HDL design flow.

In the edge platforms and on the cloud, FPGAs are responsible for accelerating compute-intensive functions. Although theoretically, HDLs can be used to describe these types of accelerators, HLS is more promising. Moreover, it is almost the only feasible approach to provide function accelerators just in a couple of hours. FPGA vendors provide several hardware and software libraries to implement algorithms in machine learning, scientific computing, image and video processing and other application areas.

Online Courses on High-Level Synthesis

Throughout a couple of courses, I will cover almost all the design techniques and approaches involved in designing FPGA-based circuits and accelerators on these three levels of computing.

The “High-Level Synthesis for FPGA” course series focuses on end-devices. It explains how to design simple and complex digital circuits and controllers to add unique features and make end devices functional.

The “Function Acceleration on FPGA” course series focuses on FPGA-based embedded systems targeting Edge platforms. In this series, we will learn how to describe complex algorithms to run efficiently on edge platforms. For example, in the first part of this series, the support vector machine, one of the most successful machine-learning algorithms, will be mapped on Zynq and Zynq MPSoC.

In the future, I will also prepare some courses targeting clout computing.