The goal of this blog is to create a Vitis 2021.1 hardware accelerator platform for the Zybo-Z7-20 board from Digilent.

If you are interested to know how to use this platform to accelerate different compute-intensive tasks such as Support Vector Machine (SVM) on an FPGA-based embedded system, please refer to here.

Creating a Vitis platform has three main steps:

1. Hardware: Using Vivado to prepare the underlying hardware components and generate an XSA file
2. Software: Using the PetaLinux to configure and generate the corresponding Linux operating system.
3. Platform: Using Vitis to integrate the hardware and software components and generate the final platform

Before starting the process of creating a Vitis hardware platform, we should install two software tools.

1. Vitis 2021.1
2. PetaLinux 2021.1

After installing the required software tools, we should prepare the folder hierarchy. For this purpose, perform the following commands

$ cd  ~/workspace
$ mkdir zybo_z7_20_base_2021_1
$ cd zybo_z7_20_base_2021_1
$ mkdir hardware software platform
$ cd software/
$ mkdir linux-files
$ cd linux-files/
$ mkdir boot 

1.    Hardware modules

1- Run the Vivado and create a project in the hardware folder with the “zybo_z7_20_base_2021_1-vivado” name.

2- On the Project Type page, choose the RTL project and select the following two options.
a. Do not specify sources at this time
b. project is an extensible Vitis platform

3- Then choose the Zybo-Z7-20 as the underlying FPGA platform.

4- Create a block design and type “zybo_z7_20_base_2021_1” as the design name.

5- Add a Zynq IP to the design area and click on the “Run Block Automation” link on the top

6- Then add a clocking wizard IP. Then customise it and enable five clocks in the output clocks tab.

7- Also, make the clock reset active low.

8- Add five “Processor System Reset” IPs to the design and connect the IPs together, as shown in the following figure

9- Now double click on the Zynq IP and enable the IRQ_F2P interrupt.

10- Add an “AXI interrupt controller” IP and customise by changing the “interrupt output connection” to single

11- Then click on the “Run Connection Automation” link. Then press OK.

12- Connect the irq output pin to the Zynq interrupt input.

13- Click on the “WindowPlatform Setup” option.

14- Under the AIX Port tab, enable M_AXI_GP1 and S_AXI_HP0 to S_AXI_HP3. And set the SP tags as follows

15- In the same tab, enable M01_AXI to M31_AXI ports.

16- In the clock tab, enables the clock and change there is as they must start from 0. Then select clk_out2 (100MHz) as default.

17- In the interrupt tab, enable the intr

18- To enable the Vitis hardware emulation, select Zynq and, in the Properties tab, set the SELECTED_SIM_MODEL to tlm.

19- Now we should synthesise the design and generate the bitstream. Right-click on the Zybo design under the “Design Sources” folder in the Sources tab and select “Generate Output Products …”.

20- Right-click again on the Zybo design under the Design Sources in the Sources tab and select “Create HDL Wrapper…”.

21- Then click on Generate Bitstream link.

22- After generating the bitstream successfully, click on the “FileExportExport Platform…” link.

23- On the “Platform Type” page, select the “Hardware and hardware emulation” option

24- Select the “Include bitstream” option on the platform state page. Then continue to generate the XSA file.

2.    Software – PetaLinux

Now go to the software folder we created earlier

1- Run the settings.h under the PetaLinux tools.
$ source /tools/Xilinx/PetaLinux/2021.1/settings.sh

2- Create a petalinux project project
$ petalinux-create -t project --template zynq -n zybo_z7_20_base_2021_1-petalinux

3- Then go to the created project
$ cd zybo_z7_20_base_2021_1-petalinux/
$ petalinux-config --get-hw-description=../../hardware/zybo_z7_20_base_2021_1-vivado/

The “misc/config System Configuration” window will appear. Accept the defaults, save and exit.

4- Now let’s config the kernel. Run this command

$ petalinux-config -c kernel

Accept the defaults, save and exit.

5- Edit the user-rootfsconfig file

$ gedit ./project-spec/meta-user/conf/user-rootfsconfig

Add the following lines to the file

CONFIG_xrt
CONFIG_xrt-dev
CONFIG_zocl
CONFIG_opencl-clhpp-dev
CONFIG_opencl-headers-dev
CONFIG_packagegroup-petalinux-opencv

6- Config the rootfs by running this command

$ petalinux-config -c rootfs

Enable all the packages inside the user package folder. Then save and exit.

7- Now, build the project
$ petalinux-build

8- After finishing the build process successfully, we should generate the SDK. For this purpose, run this command
$ petalinux-build --sdk

9- Now, go to the image/linux folder under the petalinux project and run
$ ./sdk.sh
Enter the linux_files folder (we created earlier) path when it asks you to do so.

10- Copy image.ub, rootfs.cpio, u-boot.elf, zynq_fsbl.elf, and system.dtb into boot folder that we created eailer.

$ cp image.ub rootfs.cpio u-boot.elf zynq_fsbl.elf system.dtb /home/numvar/workspace/zybo_z7_20_base_2021_1/software/linux-files/boot

11- We also should copy the boot.scr file. But the file generated by the PetaLinux doesn’t work on the Zybo, so we copy the modified file instead. (to understand the reason behind this, please refer to this link ). Download the modified file from here and copy that in the boot folder.

12- Create a file with the name of linux.bif and add the following line in that

/* linux */
the_ROM_image:
{
  [bootloader]<zybo_z7_20_2021_1/boot/zynq_fsbl.elf>
  <bitstream>
  <uboot,zybo_z7_20_2021_1/boot/u-boot.elf>
  [load=0x00100000] <dtb,xilinx_zc706_base_202110_1/boot/system.dtb>
}

13- Create a file with the name of qemu_args.txt and add the following line in that

-M
arm-generic-fdt-7series
-serial
/dev/null
-serial
mon:stdio
-device
loader,addr=0xf8000008,data=0xDF0D,data-len=4
-device
loader,addr=0xf8000140,data=0x00500801,data-len=4
-device
loader,addr=0xf800012c,data=0x1ed044d,data-len=4
-device
loader,addr=0xf8000108,data=0x0001e008,data-len=4
-device
loader,addr=0xF800025C,data=0x00000005,data-len=4
-device
loader,addr=0xF8000240,data=0x00000000,data-len=4
-boot
mode=5
-device
loader,addr=0x100000,file=<zybo_z7_20_2021_1/qemu/system.dtb>
-kernel
<zybo_z7_20_2021_1/qemu/u-boot.elf>
-machine
linux=on

Now we are ready for the next step.

3.    Create Platform

1- Run the Vitis software and select the platform folder (created earlier) as the workspace.

2- Choose “zybo_z7_20_base_2021_1” as the platform name.

3- Choose the created XSA file located in the Vivaado project under the hardware folder. Then select Linux as the OS

4- Now fill in the empty field under the Linux on ps7_cortex_a9 as shown in the figure

5- Then right-click in the project and select “Build Project”

6- The platform will be generated and located in the export folder.

Now we can create an application to test the platform.

7- For this purpose, click on File–>New–>Application Project…

8- Select the created platform

9- Type “vector_addition” as the application name

10- Choose the Vector Addition as the platform

11- After creating the project successfully, you can build that for software emulation, hardware emulation and hardware. Let’s compile that for hardware. Change the active build configuration to hardware and build the project.

12- Create a FAT32 parttion on the FPGA bpard sd-card

13- Go to the “vector_addition_system/Hardware/package/sd_card/” folder in the template folder and copy five files into the sd-card

               $ cp binary_container_1.xclbin BOOT.BIN boot.scr image.ub vector_addition /media/numvar/BOOT/

14- Then boot the system. After booting the system successfully, go to the /media/ sd-mmcblk0p1 and run the application by running this command

$ ./vector_addition binary_container_1.xclbin

You should see the TEST PASSED message.